YADRO — группа российских технологических компаний, объединяющая направления разработки и производства вычислительных платформ, систем обработки и хранения данных, телекоммуникационного и сетевого оборудования.
Syntacore – semiconductor IP company creating customizable microprocessor cores, technologies and software tools based on RISC-V ISA, founding member of RISC-V International.
Our clients and partners are key companies from US, Asia, Europe and Russia, developing computational platforms, storage systems, personal and smart devices, including high-performance heterogenous multi-core systems with complex specialization and ISA extensions manufactured using latest technologies. We are active member of conferences and working groups on RISC-V standardization and open-source projects, open-source SCR1 core published under permissive license became one of the most popular RISC-V processor GitHub projects.
Purpose
Our team develops a generator of Verilog components used in the CPU cluster: coherent interconnect and AXI crossbar. The tool is used to increase productivity of hardware developers and verificators. The tool is used to generate components of various configurations including large CPU clusters that integrate dozens of CPU cores, System Level Cache banks and peripheral devices connected with thousands of individual wires.
Responsibilities
Required qualifications
Could be a plus:
We offer: